An inverse method to determine parasitics of power interconnections in high speed electronics
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摘要
In computing parasitics of power interconnections to driving circuits in high speed electronics the two-dimensional integral of the measured voltage drops has to be computed, which makes the numerical results unreliable. In this paper we reduce the problem to the computation of a special single dimensional integral, which makes the method applicable in practical situations. A numerical example illustrates the methodology.
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论文评审过程:Available online 6 April 2000.
论文官网地址:https://doi.org/10.1016/0096-3003(94)00250-9