Vdiff: a program differencing algorithm for Verilog hardware description language

摘要

During code review tasks, comparing two versions of a hardware design description using existing program differencing tools such as diff is inherently limited because these tools implicitly assume sequential execution semantics, while hardware description languages are designed to model concurrent computation. We designed a position-independent differencing algorithm to robustly handle language constructs whose relative orderings do not matter. This paper presents Vdiff, an instantiation of this position-independent differencing algorithm for Verilog HDL. To help programmers reason about the differences at a high-level, Vdiff outputs syntactic differences in terms of Verilog-specific change types. The quantitative evaluation of Vdiff on two open source hardware design projects shows that Vdiff is very accurate, with overall 96.8 % precision and 97.3 % recall when using manually classified differences as a basis of comparison. Vdiff is also fast and scalable—it processes the entire revision history of nine open projects all under 5.35 minutes. We conducted a user study with eight hardware design experts to understand how the program differences identified by the experts match Vdiff’s output. The study results show that Vdiff’s output is better aligned with the experts’ classification of Verilog changes than an existing textual program differencing tool.