An evolutionary approach to implement logic circuits on three dimensional FPGAs

作者：

Highlights：

• Presentation of a low overhead thermal-aware architecture for 3D FPGA.

• Developing an efficient unbalanced SA-based partitioning algorithm.

• Developing a cost efficient and thermal-aware placement algorithm for 3D FPGAs.

摘要

•Presentation of a low overhead thermal-aware architecture for 3D FPGA.•Developing an efficient unbalanced SA-based partitioning algorithm.•Developing a cost efficient and thermal-aware placement algorithm for 3D FPGAs.

论文关键词：3D FPGA,Simulated annealing,Partitioning,Place and route,3D architecture,Heat transfer

论文评审过程：Received 4 August 2020, Revised 19 December 2020, Accepted 20 February 2021, Available online 26 February 2021, Version of Record 3 March 2021.

论文官网地址：https://doi.org/10.1016/j.eswa.2021.114780