Editorial Board
Multicore computing systems: Architecture, programming tools, and applications
Utility accrual object distribution in MPSoC real-time embedded systems
Scalable load balancing congestion-aware Network-on-Chip router architecture
Developing a power-efficient and low-cost 3D NoC using smart GALS-based vertical channels
Reliable energy-aware application mapping and voltage–frequency island partitioning for GALS-based NoC
Cluster-based topologies for 3D Networks-on-Chip using advanced inter-layer bus architecture
Efficient genetic based topological mapping using analytical models for on-chip networks
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