Volume 39, Number 12, December 2020
An Algorithm for the Search of a Low Capacitor Count DAC Switching Scheme for SAR ADCs.

Mikhail M. Pilipko Dmitry V. Morozov

A New Necessary Condition for Threshold Function Identification.

Chia-Chun Lin Chin-Heng Liu Yung-Chih Chen Chun-Yao Wang

A Directed Test Generator for Shared-Memory Verification of Multicore Chip Designs.

Gabriel A. G. Andrade Marleson Graf Nícolas Pfeifer Luiz C. V. dos Santos

Speeding Up Functional Timing Analysis by Concise Formulation of Timed Characteristic Functions.

Denny C.-Y. Wu Aaron C.-W. Liang Charles H.-P. Wen

Searching for Bugs Using Probabilistic Suspect Implications.

Neil Veira Zissis Poulos Andreas G. Veneris

LFSR-Based Test Generation for Reduced Fail Data Volume.

Irith Pomeranz Srikanth Venkataraman

Enhancing Temporal Logic Falsification With Specification Transformation and Valued Booleans.

Johan Lidén Eddeland Koen Claessen Nicholas Smallbone Zahra Ramezani Sajed Miremadi Knut Åkesson

Direct Computation of LFSR-Based Stored Tests for Broadside and Skewed-Load Tests.

Irith Pomeranz

Test Time Reduction of 3-D Stacked ICs Using Ternary Coded Simultaneous Bidirectional Signaling in Parallel Test Ports.

Iftikhar A. Soomro Mohammad Samie Ian K. Jennions

A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions.

Hsin-I Wu Da-Yi Guo Ren-Song Tsay

PSION+: Combining Logical Topology and Physical Layout Optimization for Wavelength-Routed ONoCs.

Alexandre Truppel Tsun-Ming Tseng Davide Bertozzi José Carlos Alves Ulf Schlichtmann

Cross-Layer Co-Optimization of Network Design and Chiplet Placement in 2.5-D Systems.

Ayse K. Coskun Furkan Eris Ajay Joshi Andrew B. Kahng Yenai Ma Aditya Narayan Vaishnav Srinivas

GAAS: An Efficient Group Associated Architecture and Scheduler Module for Sparse CNN Accelerators.

Jingyu Wang Zhe Yuan Ruoyang Liu Xiaoyu Feng Li Du Huazhong Yang Yongpan Liu

Allocating One Common ACC-Rich Platform for Many Streaming Applications.

Jinghan Zhang Hamed Tabkhi Gunar Schirner

Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power Management.

An Zou Jingwen Leng Xin He Yazhou Zu Christopher D. Gill Vijay Janapa Reddi Xuan Zhang

Mixed-Cell-Height Legalization Considering Technology and Region Constraints.

Ziran Zhu Jianli Chen Wenxing Zhu Yao-Wen Chang

3-Step Rectilinear Minimum Spanning Tree Construction for Obstacle-Avoiding Component-to-Component Routing.

Emilio Wuerges

NP-Separate: A New VLSI Design Methodology for Area, Power, and Performance Optimization.

Monzurul Islam Dewan Dae Hyun Kim

Grid-Based Framework for Routability Analysis and Diagnosis With Conditional Design Rules.

Dongwon Park Daeyeal Lee Ilgweon Kang Chester Holtz Sicun Gao Bill Lin Chung-Kuan Cheng

ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUs.

Yibo Lin Wuxi Li Jiaqi Gu Haoxing Ren Brucek Khailany David Z. Pan

A Unified Framework for Simultaneous Layout Decomposition and Mask Optimization.

Yuzhe Ma Wei Zhong Shuxiang Hu Jhih-Rong Gao Jian Kuang Jin Miao Bei Yu

Exploring Multiple Analog Placements With Partial-Monotonic Current Paths and Symmetry Constraints Using PCP-SP.

Abhishek Patyal Po-Cheng Pan K. A. Asha Hung-Ming Chen Wei-Zen Chen

Clock-Aware Placement for Large-Scale Heterogeneous FPGAs.

Jianli Chen Zhifeng Lin Yun-Chih Kuo Chau-Chin Huang Yao-Wen Chang Shih-Chun Chen Chun-Han Chiang Sy-Yen Kuo

LEVAX: An Input-Aware Learning-Based Error Model of Voltage-Scaled Functional Units.

Xun Jiao Dongning Ma Wanli Chang Yu Jiang

A Macromodeling Approach for Analog Behavior of Digital Integrated Circuits.

Nahid Mirzaie Ron Rohrer

Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures.

Di Gao Dayane Reis Xiaobo Sharon Hu Cheng Zhuo

An Efficient Adaptive Importance Sampling Method for SRAM and Analog Yield Analysis.

Xiao Shi Hao Yan Jinxin Wang Jiajia Zhang Longxing Shi Lei He

Additive Statistical Leakage Analysis Using Exponential Mixture Model.

Hyun-jeong Kwon Sung-Yun Lee Young Hwan Kim Seokhyeong Kang

Efficient Statistical Analysis for Correlated Rare Failure Events via Asymptotic Probability Approximation.

Fulin Peng Handi Yu Jun Tao Yangfeng Su Dian Zhou Xuan Zeng Xin Li

Chance-Constrained and Yield-Aware Optimization of Photonic ICs With Non-Gaussian Correlated Process Variations.

Chunfeng Cui Kaikai Liu Zheng Zhang

GRASS: Graph Spectral Sparsification Leveraging Scalable Spectral Perturbation Analysis.

Zhuo Feng

Floating Random Walk Capacitance Solver Tackling Conformal Dielectric With On-the-Fly Sampling on Eight-Octant Transition Cubes.

Ming Yang Wenjian Yu

IJTAG-Based Fault Recovery and Robust Microelectrode-Cell Design for MEDA Biochips.

Zhanwei Zhong Krishnendu Chakrabarty

Toward Secure Checkpointing for Micro-Electrode-Dot-Array Biochips.

Mohammed Shayan Tung-Che Liang Sukanta Bhattacharjee Krishnendu Chakrabarty Ramesh Karri

Reconfigurable and Low-Complexity Accelerator for Convolutional and Generative Networks Over Finite Fields.

Weihong Xu Zaichen Zhang Xiaohu You Chuan Zhang

Swallow: A Versatile Accelerator for Sparse Neural Networks.

Bosheng Liu Xiaoming Chen Yinhe Han Haobo Xu

DSP-Efficient Hardware Acceleration of Convolutional Neural Network Inference on FPGAs.

Dong Wang Ke Xu Jingning Guo Soheil Ghiasi

Development of Programmable Logic Array for Multiple-Valued Logic Functions.

Vitaly G. Levashenko Igor Lukyanchuk Elena Zaitseva Miroslav Kvassay Jan Rabcan Patrik Rusnak

A Hardware Generator for SORN Arithmetic.

Jochen Rust Moritz Bärthel Pascal Seidel Steffen Paul

FLASH: Fast, Parallel, and Accurate Simulator for HLS.

Young-kyu Choi Yuze Chi Jie Wang Jason Cong

A Novel Area-Power Efficient Design for Approximated Small-Point FFT Architecture.

Xueyu Han Jiajia Chen Boyu Qin Susanto Rahardja

Hardware/Software Co-Exploration of Neural Architectures.

Weiwen Jiang Lei Yang Edwin Hsing-Mean Sha Qingfeng Zhuge Shouzhen Gu Sakyasingha Dasgupta Yiyu Shi Jingtong Hu

FCDM: A Methodology Based on Sensor Pattern Noise Fingerprinting for Fast Confidence Detection to Adversarial Attacks.

Yazhu Lan Kent W. Nixon Qingli Guo Guohe Zhang Yuanchao Xu Hai Li Yiran Chen

Safe Overclocking for CNN Accelerators Through Algorithm-Level Error Detection.

Thibaut Marty Tomofumi Yuki Steven Derrien

M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs.

Aseem Sayal Paras Ajay Mark W. McDermott S. V. Sreenivasan Jaydeep P. Kulkarni

Binarizing Weights Wisely for Edge Intelligence: Guide for Partial Binarization of Deconvolution-Based Generators.

Jinglan Liu Jiaxin Zhang Yukun Ding Xiaowei Xu Meng Jiang Yiyu Shi

RED: A ReRAM-Based Efficient Accelerator for Deconvolutional Computation.

Ziru Li Bing Li Zichen Fan Hai Li

A Dynamic Look-Ahead Heuristic for the Qubit Mapping Problem of NISQ Computers.

Pengcheng Zhu Zhijin Guan Xueyun Cheng

Long Live TIME: Improving Lifetime and Security for NVM-Based Training-in-Memory Systems.

Yi Cai Yujun Lin Lixue Xia Xiaoming Chen Song Han Yu Wang Huazhong Yang

Toward a High-Performance and Low-Loss Clos-Benes-Based Optical Network-on-Chip Architecture.

Renjie Yao Yaoyao Ye

Quantum Circuit Transformation Based on Simulated Annealing and Heuristic Search.

Xiangzhen Zhou Sanjiang Li Yuan Feng

Miss Penalty Aware Cache Replacement for Hybrid Memory Systems.

Hai Jin Di Chen Haikun Liu Xiaofei Liao Rentong Guo Yu Zhang

Overcoming the Tradeoff Between Accuracy and Compactness in Decision Diagrams for Quantum Computation.

Philipp Niemann Alwin Zulehner Rolf Drechsler Robert Wille

Monitoring Aging Defects in STT-MRAMs.

Govind Radhakrishnan Youngki Yoon Manoj Sachdev

Temperature Aware Adaptations for Improved Read Reliability in STT-MRAM Memory Subsystem.

Saravanan Sethuraman Venkata Kalyan Tavva Karthick Rajamani Chitra K. Subramanian Kyu-hyoun Kim Hillery C. Hunter M. B. Srinivas

Data Reuse for Accelerated Approximate Warps.

Daniel Peroni Mohsen Imani Hamid Nejatollahi Nikil D. Dutt Tajana Rosing

Temperature-Aware Persistent Data Management for LSM-Tree on 3-D NAND Flash Memory.

Yi Wang Jiali Tan Rui Mao Tao Li

LESS-MICS: A Low Energy Standby-Sparing Scheme for Mixed-Criticality Systems.

Sepideh Safari Shaahin Hessabi Ghazal Ershadi

GC-Steering: GC-Aware Request Steering and Parallel Reconstruction Optimizations for SSD-Based RAIDs.

Suzhen Wu Weidong Zhu Yingxin Han Hong Jiang Bo Mao Zhijie Huang Liang Chen

An Efficient Directory Entry Lookup Cache With Prefix-Awareness for Mobile Devices.

Zhaoyan Shen Lei Han Renhai Chen Chenlin Ma Zhiping Jia Zili Shao

BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction.

Ruixiang Ma Fei Wu Zhonghai Lu Wenmin Zhong Qiulin Wu Jiguang Wan Changsheng Xie

B*-Sort: Enabling Write-Once Sorting for Nonvolatile Memory.

Yu-Pei Liang Tseng-Yi Chen Yuan-Hao Chang Shuo-Han Chen Hsin-Wen Wei Wei-Kuan Shih

Capacity Augmentation Function for Real-Time Parallel Tasks With Constrained Deadlines Under GEDF Scheduling.

Jinghao Sun Nan Guan Shuangshuang Chang Feng Li Qingxu Deng Wang Yi

A Guaranteed Secure Scan Design Based on Test Data Obfuscation by Cryptographic Hash.

Aijiao Cui Mengyang Li Gang Qu Huawei Li

Real-Time Detection and Localization of Distributed DoS Attacks in NoC-Based SoCs.

Subodha Charles Yangdi Lyu Prabhat Mishra

Novel Design Strategy Toward A2 Trojan Detection Based on Built-In Acceleration Structure.

Ding Deng Yaohua Wang Yang Guo

TimingCamouflage+: Netlist Security Enhancement With Unconventional Timing.

Grace Li Zhang Bing Li Meng Li Bei Yu David Z. Pan Michaela Brunner Georg Sigl Ulf Schlichtmann

Obfuscating the Interconnects: Low-Cost and Resilient Full-Chip Layout Camouflaging.

Satwik Patnaik Mohammed Ashraf Ozgur Sinanoglu Johann Knechtel

Hardware Assisted Buffer Protection Mechanisms for Embedded RISC-V.

Asmit De Aditya Basu Swaroop Ghosh Trent Jaeger

Truly Stripping Functionality for Logic Locking: A Fault-Based Perspective.

Abhrajit Sengupta Mohammed Nabeel Nimisha Limaye Mohammed Ashraf Ozgur Sinanoglu

Mathematical Modeling Analysis of Strong Physical Unclonable Functions.

Yunhao Xu Yingjie Lao Weiqiang Liu Zaichen Zhang Xiaohu You Chuan Zhang

Security-Aware Obfuscated Priority Assignment for CAN FD Messages in Real-Time Parallel Automotive Applications.

Guoqi Xie Renfa Li Shiyan Hu

Enabling Failure-Resilient Intermittent Systems Without Runtime Checkpointing.

Wei-Ming Chen Tei-Wei Kuo Pi-Cheng Hsiu

CAST: Content-Aware STT-MRAM Cache Write Management for Different Levels of Approximation.

Amir Mahdi Hosseini Monazzah Amir M. Rahmani Antonio Miele Nikil D. Dutt

Synthesis of mm-Wave Wideband Receivers in 28-nm CMOS Technology for Automotive Radar Applications.

Fábio Passos Miguel Chanca Elisenda Roca Rafael Castro-López Francisco V. Fernández

Gradient Error Compensation in SC-MDACs.

Satyajit Mohapatra Nihar Ranjan Mohapatra

A Simple and Accurate Modeling Method of Channel Thermal Noise Using BSIM4 Noise Models.

Ilho Myeong Juhyun Kim Hyungwoo Ko Ickhyun Song Yongseok Kim Hyungcheol Shin

Integration of Traveling Wave Optical Device Models Into an MNA-Based Circuit Simulator.

Tom J. Smy John H. Rasmussen

An Automated Topology Synthesis Framework for Analog Integrated Circuits.

Zhenxin Zhao Lihong Zhang

A gm/ID Methodology Based Data-Driven Search Algorithm for the Design of Multistage Multipath Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time ΣΔ-Modulators.

Fikre Tsigabu Gebreyohannes Jacky Porte Marie-Minerve Louërat Hassan Aboushady


Volume 39, Number 11, November 2020
Wolfgang Rosenstiel.

Raúl Camposano Oliver Bringmann

WinoNN: Optimizing FPGA-Based Convolutional Neural Network Accelerators Using Sparse Winograd Algorithm.

Xuan Wang Chao Wang Jing Cao Lei Gong Xuehai Zhou

WinDConv: A Fused Datapath CNN Accelerator for Power-Efficient Edge Devices.

Gopinath Mahale Pramod P. Udupa Kiran Kolar Chandrasekharan Sehwan Lee

When Storage Response Time Catches Up With Overall Context Switch Overhead, What Is Next?

Chun-Feng Wu Yuan-Hao Chang Ming-Chang Yang Tei-Wei Kuo

VisSched: An Auction-Based Scheduler for Vision Workloads on Heterogeneous Processors.

Diksha Moolchandani Anshul Kumar José F. Martínez Smruti R. Sarangi

UltraTrail: A Configurable Ultralow-Power TC-ResNet AI Accelerator for Efficient Keyword Spotting.

Paul Palomero Bernardo Christoph Gerum Adrian Frischknecht Konstantin Lübeck Oliver Bringmann

Toward Speculative Loop Pipelining for High-Level Synthesis.

Steven Derrien Thibaut Marty Simon Rokicki Tomofumi Yuki

Tensor Optimization for High-Level Synthesis Design Flows.

Marco Siracusa Fabrizio Ferrandi

Suspension-Aware Earliest-Deadline-First Scheduling Analysis.

Mario Günzel Georg von der Brüggen Jian-Jia Chen

SuperSlash: A Unified Design Space Exploration and Model Compression Methodology for Design of Deep Learning Accelerators With Reduced Off-Chip Memory Access Volume.

Hazoor Ahmad Tabasher Arif Muhammad Abdullah Hanif Rehan Hafiz Muhammad Shafique

StereoEngine: An FPGA-Based Accelerator for Real-Time High-Quality Stereo Estimation With Binary Neural Network.

Gang Chen Yehua Ling Tao He Haitao Meng Shengyu He Yu Zhang Kai Huang

Static Scheduling of Moldable Streaming Tasks With Task Fusion for Parallel Systems With DVFS.

Christoph W. Kessler Sebastian Litzinger Jörg Keller

Standing on the Shoulders of Giants: Hardware and Neural Architecture Co-Search With Hot Start.

Weiwen Jiang Lei Yang Sakyasingha Dasgupta Jingtong Hu Yiyu Shi

Specification-Guided Automated Debugging of CPS Models.

Nikhil Kumar Singh Indranil Saha

Sparsity Turns Adversarial: Energy and Latency Attacks on Deep Neural Networks.

Sarada Krithivasan Sanchari Sen Anand Raghunathan

Shift-Limited Sort: Optimizing Sorting Performance on Skyrmion Memory-Based Systems.

Yun-Shan Hsieh Po-Chun Huang Ping-Xiang Chen Yuan-Hao Chang Wang Kang Ming-Chang Yang Wei-Kuan Shih

SEAL: User Experience-Aware Two-Level Swap for Mobile Devices.

Changlong Li Liang Shi Yu Liang Chun Jason Xue

Safety Verification for Random Ordinary Differential Equations.

Bai Xue Martin Fränzle Naijun Zhan Sergiy Bogomolov Bican Xia

SaeCAS: Secure Authenticated Execution Using CAM-Based Vector Storage.

Orlando Arias Dean Sullivan Haoqi Shan Yier Jin

Runtime Task Scheduling Using Imitation Learning for Heterogeneous Many-Core Systems.

Anish Krishnakumar Samet E. Arda A. Alper Goksoy Sumit K. Mandal Ümit Y. Ogras Anderson L. Sartor Radu Marculescu

Risk-5: Controlled Approximations for RISC-V.

Isaías B. Felzmann João Fabrício Filho Lucas Francisco Wanner

Retention Correlated Read Disturb Errors in 3-D Charge Trap NAND Flash Memory: Observations, Analysis, and Solutions.

Yachen Kong Meng Zhang Xuepeng Zhan Rui Cao Jiezhi Chen

ReSQM: Accelerating Database Operations Using ReRAM-Based Content Addressable Memory.

Huize Li Hai Jin Long Zheng Xiaofei Liao

Reachability Analysis of Linear Hybrid Systems via Block Decomposition.

Sergiy Bogomolov Marcelo Forets Goran Frehse Kostiantyn Potomkin Christian Schilling

Quantitative Timing Analysis for Cyber-Physical Systems Using Uncertainty-Aware Scenario-Based Specifications.

Ming Hu Wenxue Duan Min Zhang Tongquan Wei Mingsong Chen

Pruning Deep Reinforcement Learning for Dual User Experience and Storage Lifetime Improvement on Mobile Devices.

Chao Wu Yufei Cui Cheng Ji Tei-Wei Kuo Chun Jason Xue

Precedence-Aware Automated Competitive Analysis of Real-Time Scheduling.

Andreas Pavlogiannis Nico Schaumberger Ulrich Schmid Krishnendu Chatterjee

Polyhedral Compilation for Racetrack Memories.

Asif Ali Khan Hauke Mewes Tobias Grosser Torsten Hoefler Jerónimo Castrillón

Patch-Based Data Management for Dual-Copy Buffers in RAID-Enabled SSDs.

Jun Li Zhibing Sha Zhigang Cai François Trahay Jianwei Liao

PAC Model Checking of Black-Box Continuous-Time Dynamical Systems.

Bai Xue Miaomiao Zhang Arvind Easwaran Qin Li

Optrone: Maximizing Performance and Energy Resources of Drone Batteries.

Jiwon Kim Yonghun Choi Seunghyeok Jeon Jaeyun Kang Hojung Cha

Optimizing Sensor Deployment and Maintenance Costs for Large-Scale Environmental Monitoring.

Xiaofan Yu Kazim Ergun Ludmila Cherkasova Tajana Simunic Rosing

Optimizing Energy in Non-Preemptive Mixed-Criticality Scheduling by Exploiting Probabilistic Information.

Ashikahmed Bhuiyan Federico Reghenzani William Fornaciari Zhishan Guo

Optimizing Discharge Efficiency of Reconfigurable Battery With Deep Reinforcement Learning.

Seunghyeok Jeon Jiwon Kim Junick Ahn Hojung Cha

Optimization of Intercache Traffic Entanglement in Tagless Caches With Tiling Opportunities.

S. R. Swamy Saranam Chongala Sumitha George Hariram Thirucherai Govindarajan Jagadish Kotra Madhu Mutyam John Sampson Mahmut T. Kandemir Vijaykrishnan Narayanan

Online Signal Monitoring With Bounded Lag.

Konstantinos Mamouras Zhifu Wang

On Minimizing Analog Variation Errors to Resolve the Scalability Issue of ReRAM-Based Crossbar Accelerators.

Yao-Wen Kang Chun-Feng Wu Yuan-Hao Chang Tei-Wei Kuo Shu-Yin Ho

NPU Thermal Management.

Hussam Amrouch Georgios Zervakis Sami Salamin Hammam Kattan Iraklis Anagnostopoulos Jörg Henkel

NEWERTRACK: ML-Based Accurate Tracking of In-Mouth Nutrient Sensors Position Using Spectrum-Wide Information.

Amir Hosein Afandizadeh Zargari Manik Dautta Marzieh Ashrafiamiri Minjun Seo Peter Tseng Fadi J. Kurdahi

Modular Design and Optimization of Biomedical Applications for Ultralow Power Heterogeneous Platforms.

Elisabetta De Giovanni Fabio Montagna Benoît W. Denkinger Simone Machetti Miguel Peón Quirós Simone Benatti Davide Rossi Luca Benini David Atienza

Mining Shape Expressions From Positive Examples.

Ezio Bartocci Jyotirmoy Deshmukh Felix Gigler Cristinel Mateis Dejan Nickovic Xin Qin

MeXT-SE: A Design Tool to Transparently Generate Secure MPSoC.

Md Jubaer Hossain Pantho Christophe Bobda

Meshed Bluetree: Time-Predictable Multimemory Interconnect for Multicore Architectures.

Haitong Wang Neil C. Audsley Xiaobo Sharon Hu Wanli Chang

Maskara: Compilation of a Masking Countermeasure With Optimized Polynomial Interpolation.

Nicolas Belleville Damien Couroussé Karine Heydemann Quentin L. Meunier Inès Ben El Ouahma

Managing Fleets of LEO Satellites: Nonlinear, Optimal, Efficient, Scalable, Usable, and Robust.

Gregory Stock Juan A. Fraire Tobias Mömke Holger Hermanns Fakhri Babayev Eduardo Cruz

MacLeR: Machine Learning-Based Runtime Hardware Trojan Detection in Resource-Constrained IoT Edge Devices.

Faiq Khalid Syed Rafay Hasan Sara Zia Osman Hasan Falah Awwad Muhammad Shafique

Leveraging Prior Knowledge for Effective Design-Space Exploration in High-Level Synthesis.

Lorenzo Ferretti Jihye Kwon Giovanni Ansaloni Giuseppe Di Guglielmo Luca P. Carloni Laura Pozzi

Learning-Based Quality Management for Approximate Communication in Network-on-Chips.

Yuechen Chen Ahmed Louri

LATICS: A Low-Overhead Adaptive Task-Based Intermittent Computing System.

Songran Liu Wei Zhang Mingsong Lv Qiulin Chen Nan Guan

INDRA: Intrusion Detection Using Recurrent Autoencoders in Automotive Embedded Systems.

Vipin Kumar Kukkala Sooryaa Vignesh Thiruloga Sudeep Pasricha

Hydrone: Reconfigurable Energy Storage for UAV Applications.

Jiwon Kim Sungwoo Baek Yonghun Choi Junick Ahn Hojung Cha

Hybrid System Falsification Under (In)equality Constraints via Search Space Transformation.

Zhenya Zhang Paolo Arcaini Ichiro Hasuo

HRM: Merging Hardware Event Monitors for Improved Timing Analysis of Complex MPSoCs.

Sergi Vilardell Isabel Serra Roberto Santalla Enrico Mezzetti Jaume Abella Francisco J. Cazorla

HopliteRT*: Real-Time NoC for FPGA.

Yilian Ribot González Geoffrey Nelissen

Hardware-Level Thread Migration to Reduce On-Chip Data Movement Via Reinforcement Learning.

Quintin Fettes Avinash Karanth Razvan C. Bunescu Ahmed Louri Kyle Shiflett

Hardware Memory Management for Future Mobile Hybrid Memory Systems.

Fei Wen Mian Qin Paul V. Gratz A. L. Narasimha Reddy

Fusion-Catalyzed Pruning for Optimizing Deep Learning on Intelligent Edge Devices.

Guangli Li Xiu Ma Xueying Wang Lei Liu Jingling Xue Xiaobing Feng

FSpiNN: An Optimization Framework for Memory-Efficient and Energy-Efficient Spiking Neural Networks.

Rachmad Vidya Wicaksana Putra Muhammad Shafique

FSA: A Fine-Grained Systolic Accelerator for Sparse CNNs.

Fanrong Li Gang Li Zitao Mo Xiangyu He Jian Cheng

FINDER: Find Efficient Parallel Instructions for ASIPs to Improve Performance of Large Applications.

Vikkitharan Gnanasambandapillai Jorgen Peddersen Roshan G. Ragel Sri Parameswaran

Fast DRAM PUFs on Commodity Devices.

Jack Miskelly Máire O'Neill

Fast Attack-Resilient Distributed State Estimator for Cyber-Physical Systems.

Feng Yu Raj Gautam Dutta Teng Zhang Yaodan Hu Yier Jin

Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems.

Martin Kristien Tom Spink Brian Campbell Susmit Sarkar Ian Stark Björn Franke Igor Böhm Nigel P. Topham

Extending the Lifetime of MEDA Biochips by Selective Sensing on Microelectrodes.

Tung-Che Liang Zhanwei Zhong Miroslav Pajic Krishnendu Chakrabarty

Exposing Hardware Trojans in Embedded Platforms via Short-Term Aging.

Virinchi Roy Surabhi Prashanth Krishnamurthy Hussam Amrouch Jörg Henkel Ramesh Karri Farshad Khorrami

Exploring Edge Computing for Multitier Industrial Control.

Yehan Ma Chenyang Lu Bruno Sinopoli Shen Zeng

eWASM: Practical Software Fault Isolation for Reliable Embedded Devices.

Gregor Peach Runyu Pan Zhuoyi Wu Gabriel Parmer Christopher Haster Ludmila Cherkasova

Everything Leaves Footprints: Hardware Accelerated Intermittent Deep Inference.

Chih-Kai Kang Hashan Roshantha Mendis Chun-Han Lin Ming-Syan Chen Pi-Cheng Hsiu

Error Diluting: Exploiting 3-D nand Flash Process Variation for Efficient Read on LDPC-Based SSDs.

Kong-Kiat Yong Li-Pin Chang

Energy-Efficient Image Recognition System for Marine Life.

H. Seckin Demir Jennifer Blain Christen Sule Ozev

Enabling On-Device CNN Training by Self-Supervised Instance Filtering and Error Map Pruning.

Yawen Wu Zhepeng Wang Yiyu Shi Jingtong Hu

Enabling Latency-Aware Data Initialization for Integrated CPU/GPU Heterogeneous Platform.

Zhendong Wang Zihang Jiang Zhen Wang Xulong Tang Cong Liu Shouyi Yin Yang Hu

EM-Fuzz: Augmented Firmware Fuzzing via Memory Checking.

Jian Gao Yiwen Xu Yu Jiang Zhe Liu Wanli Chang Xun Jiao Jiaguang Sun

Efficient Scheduling of Irregular Network Structures on CNN Accelerators.

Shixuan Zheng Xianjue Zhang Daoli Ou Shibin Tang Leibo Liu Shaojun Wei Shouyi Yin

Efficient Return Address Verification Based on Dislocated Stack.

Jinfeng Li Qizhen Xu Yongyue Li Liwei Chen Gang Shi Dan Meng

Efficient Feasibility Analysis for Graph-Based Real-Time Task Systems.

Jinghao Sun Rongxiao Shi Kexuan Wang Nan Guan Zhishan Guo

ECG-Based Authentication Using Timing-Aware Domain-Specific Architecture.

Renato Cordeiro Dhruv Gajaria Ankur Limaye Tosiron Adegbija Nima Karimian Fatemeh Tehranipoor

Dynamic Power and Energy Management for NCFET-Based Processors.

Sami Salamin Martin Rapp Jörg Henkel Andreas Gerstlauer Hussam Amrouch

Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms.

Homa Aghilinasab Waqar Ali Heechul Yun Rodolfo Pellizzoni

Dynamic DAG Scheduling on Multiprocessor Systems: Reliability, Energy, and Makespan.

Jing Huang Renfa Li Xun Jiao Yu Jiang Wanli Chang

Divide and Slide: Layer-Wise Refinement for Output Range Analysis of Deep Neural Networks.

Chao Huang Jiameng Fan Xin Chen Wenchao Li Qi Zhu

DeepPrefetcher: A Deep Learning Framework for Data Prefetching in Flash Storage Devices.

Gaddisa Olani Ganfure Chun-Feng Wu Yuan-Hao Chang Wei-Kuan Shih

CRIMSON: Compute-Intensive Loop Acceleration by Randomized Iterative Modulo Scheduling and Optimized Mapping on CGRAs.

Mahesh Balasubramanian Aviral Shrivastava

Compositional Probabilistic Analysis of Temporal Properties Over Stochastic Detectors.

Ivan Ruchkin Oleg Sokolsky James Weimer Tushar Hedaoo Insup Lee

Combating Enhanced Thermal Covert Channel in Multi-/Many-Core Systems With Channel-Aware Jamming.

Jiachen Wang Xiaohang Wang Yingtao Jiang Amit Kumar Singh Letian Huang Mei Yang

Boosting User Experience via Foreground-Aware Cache Management in UFS Mobile Devices.

Chao Wu Qiao Li Cheng Ji Tei-Wei Kuo Chun Jason Xue

Boosting Bit-Error Resilience of DNN Accelerators Through Median Feature Selection.

Elbruz Ozen Alex Orailoglu

AxFTL: Exploiting Error Tolerance for Extending Lifetime of NAND Flash Storage.

Yongwoo Lee Jaehyun Park Junhee Ryu Younghyun Kim

Automated Controller and Sensor Configuration Synthesis Using Dimensional Analysis.

Marcus Pirron Damien Zufferey Phillip Stanley-Marbell

Assume-Guarantee Distributed Synthesis.

Rupak Majumdar Kaushik Mallik Anne-Kathrin Schmuck Damien Zufferey

AnyHLS: High-Level Synthesis With Partial Evaluation.

M. Akif Özkan Arsène Pérard-Gayot Richard Membarth Philipp Slusallek Roland Leißa Sebastian Hack Jürgen Teich Frank Hannig

Analyzing Deep Learning for Time-Series Data Through Adversarial Lens in Mobile and IoT Applications.

Taha Belkhouja Janardhan Rao Doppa

Aggressive Fine-Grained Power Gating of NoC Buffers.

Yibo Wu Leibo Liu Liang Wang Xiaohang Wang Jie Han Chenchen Deng Shaojun Wei

ABCFI: Fast and Lightweight Fine-Grained Hardware-Assisted Control-Flow Integrity.

Jinfeng Li Liwei Chen Gang Shi Kai Chen Dan Meng

A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power.

Mark Sagi Nguyen Anh Vu Doan Martin Rapp Thomas Wild Jörg Henkel Andreas Herkersdorf


Volume 39, Number 10, October 2020
Efficient Parametric Yield Estimation Over Multiple Process Corners via Bayesian Inference Based on Bernoulli Distribution.

Zhengqi Gao Jun Tao Dian Zhou Xuan Zeng

Functional Broadside Tests Under Broadcast Scan.

Irith Pomeranz

Exact Timing Analysis for Asynchronous Circuits With Multiple Periods.

Rajit Manohar

Reverse Engineering for 2.5-D Split Manufactured ICs.

Wei-Che Wang Yizhang Wu Puneet Gupta

Energy-Efficient Real-Time UAV Object Detection on Embedded Platforms.

Jianing Deng Zhiguo Shi Cheng Zhuo

High Performance Modular Multiplication for SIDH.

Weiqiang Liu Ziying Ni Jian Ni Ciara Rafferty Máire O'Neill

Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part II.

Benjamin Viale Bruno Allard

Properties First - Correct-By-Construction RTL Design in System-Level Design Flows.

Tobias Ludwig Joakim Urdahl Dominik Stoffel Wolfgang Kunz

Parallel Combinational Equivalence Checking.

Vinicius N. Possani Alan Mishchenko Renato P. Ribas André Inácio Reis

Scalable and Versatile Design Guidance Tool for the ESD Robustness of Integrated Circuits - Part I.

Benjamin Viale Bruno Allard

An Interlayer Interconnect BIST and Diagnosis Solution for Monolithic 3-D ICs.

Abhishek Koneru Krishnendu Chakrabarty

Diagnosis of Intermittent Scan Chain Faults Through a Multistage Neural Network Reasoning Process.

Mason Chern Shih-Wei Lee Shi-Yu Huang Yu Huang Gaurav Veda Kun-Han Tsai Wu-Tung Cheng

New Targets for Diagnostic Test Generation.

Irith Pomeranz

Robust Secure Shield Architecture for Detection and Protection Against Invasive Attacks.

Young-Woo Lee Hyeonchan Lim Youngkwang Lee Sungho Kang

Globally Functional Transparent-Scan Sequences.

Irith Pomeranz

NBTI and HCI Aging Prediction and Reliability Screening During Production Test.

Liting Yu Jianguo Ren Xian Lu Xiaoxiao Wang

An Automatic Test Pattern Generation Method for Multiple Stuck-At Faults by Incrementally Extending the Test Patterns.

Peikun Wang Amir Masoud Gharehbaghi Masahiro Fujita

Selecting Representative Critical Paths for Sensor Placement Provides Early FPGA Aging Information.

Mohammad Ebrahimi Zainalabedin Navabi

Low Cost Hypercompression of Test Data.

Yu Huang Sylwester Milewski Janusz Rajski Jerzy Tyszer Chen Wang

Automated Testing Flow: The Present and the Future.

Michele Portolan

LCHR-TSV: Novel Low Cost and Highly Repairable Honeycomb-Based TSV Redundancy Architecture for Clustered Faults.

Tianming Ni Yao Yao Hao Chang Lin Lu Huaguo Liang Aibin Yan Zhengfeng Huang Xiaoqing Wen

H₂O-Cloud: A Resource and Quality of Service-Aware Task Scheduling Framework for Warehouse-Scale Data Centers.

Mingxi Cheng Ji Li Paul Bogdan Shahin Nazarian

Popularity-Based Online Scaling for RAID Systems Under General Settings.

Chengjin Tian Yongkun Li Si Wu Jinzhong Chen Liu Yuan Yinlong Xu

Multitoken-Based Power Management for NAND Flash Storage Devices.

Tae-Hee You Sangwoo Han Young Min Park Hyuk-Jun Lee Eui-Young Chung

Physically Aware Affinity-Driven Multiplier Implementation.

Or Maltabashi Yehuda Kra Adam Teman

BonnCell: Automatic Cell Layout in the 7-nm Era.

Pascal Van Cleeff Stefan Hougardy Jannik Silvanus Tobias Werner

Heuristic Methods for Fine-Grain Exploitation of FDSOI.

Hamed Fatemi Andrew B. Kahng Hyein Lee José Pineda de Gyvez

SRAF Insertion via Supervised Dictionary Learning.

Hao Geng Wei Zhong Haoyu Yang Yuzhe Ma Joydeep Mitra Bei Yu

Timing-Driven Placement Optimization Facilitated by Timing-Compatibility Flip-Flop Clustering.

Dimitrios Mangiras Apostolos Stefanidis Ioannis Seitanidis Chrysostomos Nicopoulos Giorgos Dimitrakopoulos

GAN-OPC: Mask Optimization With Lithography-Guided Generative Adversarial Nets.

Haoyu Yang Shuhe Li Zihao Deng Yuzhe Ma Bei Yu Evangeline F. Y. Young

Flicker Noise Formulations in Compact Models.

Geoffrey J. Coram Colin C. McAndrew Kiran K. Gullapalli Kenneth S. Kundert

SRNoC: An Ultra-Fast Configurable FPGA-Based NoC Simulator Using Switch-Router Architecture.

Changqing Xu Yi Liu Yintang Yang

A Faithful Binary Circuit Model.

Matthias Függer Robert Najvirt Thomas Nowak Ulrich Schmid

Bayesian Optimized Mixture Importance Sampling for High-Sigma Failure Rate Estimation.

Dennis D. Weller Michael Hefenbrock Mohammad Saber Golanbari Michael Beigl Jasmin Aghassi-Hagmann Mehdi B. Tahoori

System-Level Signal Analysis Methodology for Optical Network-on-Chip Using Linear Model-Based Characterization.

Min Su Kim Yong Wook Kim Tae Hee Han

SCERPA: A Self-Consistent Algorithm for the Evaluation of the Information Propagation in Molecular Field-Coupled Nanocomputing.

Yuri Ardesi Ruiyu Wang Giovanna Turvani Gianluca Piccinini Mariagrazia Graziano

Stability and Convergency Exploration of Matrix Exponential Integration on Power Delivery Network Transient Simulation.

Xinyuan Wang Pengwen Chen Chung-Kuan Cheng

Advance Interconnect Circuit Modeling Design Using Fractional-Order Elements.

Mohammed Al-daloo Ahmed Soltan Alex Yakovlev

Lookup Table-Based Fast Reliability-Aware Sample Preparation Using Digital Microfluidic Biochips.

Lingxuan Shao Wentai Li Tsung-Yi Ho Sudip Roy Hailong Yao

Robustness Analysis for Droplet-Based Microfluidic Networks.

Gerold Fink Andreas Grimmer Medina Hamidovic Werner Haselmayr Robert Wille

Multitarget Sample Preparation Using MEDA Biochips.

Tung-Che Liang Yun-Sheng Chan Tsung-Yi Ho Krishnendu Chakrabarty Chen-Yi Lee

DNNVM: End-to-End Compiler Leveraging Heterogeneous Optimizations on FPGA-Based CNN Accelerators.

Yu Xing Shuang Liang Lingzhi Sui Xijie Jia Jiantao Qiu Xin Liu Yushun Wang Yi Shan Yu Wang

Architecting Effectual Computation for Machine Learning Accelerators.

Hang Lu Mingzhe Zhang Yinhe Han Qi Wang Huawei Li Xiaowei Li

An Artificial Neural Network Assisted Optimization System for Analog Design Space Exploration.

Yaping Li Yong Wang Yusong Li Ranran Zhou Zhaojun Lin

High-Level Synthesis Design Space Exploration: Past, Present, and Future.

Benjamin Carrión Schäfer Zi Wang

Predictive Compositional Method to Design and Reoptimize Complex Behavioral Dataflows.

Shuangnan Liu Francis C. M. Lau Benjamin Carrión Schäfer

Hybrid Evolutionary Design Space Exploration Algorithm With Defence Against Third Party IP Vulnerabilities.

Shathanaa Rajmohan N. Ramasubramanian Nagi Naganathan

Entropy-Directed Scheduling for FPGA High-Level Synthesis.

Minghua Shen Hongzheng Chen Nong Xiao

Sneak Path Free Reconfiguration With Minimized Programming Steps for Via-Switch Crossbar-Based FPGA.

Ryutaro Doi Jaehoon Yu Masanori Hashimoto

X-CGRA: An Energy-Efficient Approximate Coarse-Grained Reconfigurable Architecture.

Omid Akbari Mehdi Kamal Ali Afzali-Kusha Massoud Pedram Muhammad Shafique

Microfluidic Design for Concentration Gradient Generation Using Artificial Neural Network.

Weiqing Ji Tsung-Yi Ho Junchao Wang Hailong Yao

Test Generation for Flow-Based Microfluidic Biochips With General Architectures.

Chunfeng Liu Bing Li Bhargab B. Bhattacharya Krishnendu Chakrabarty Tsung-Yi Ho Ulf Schlichtmann

A Low-Overhead Encoding Scheme to Extend the Lifetime of Nonvolatile Memories.

Dan Feng Jie Xu Yu Hua Wei Tong Jingning Liu Chunyan Li Yiran Chen

Logic Synthesis of Approximate Circuits.

Swagath Venkataramani Vivek Joy Kozhikkottu Amit Sabne Kaushik Roy Anand Raghunathan

Multicontrol: Advanced Control-Logic Synthesis for Flow-Based Microfluidic Biochips.

Ying Zhu Xing Huang Bing Li Tsung-Yi Ho Qin Wang Hailong Yao Robert Wille Ulf Schlichtmann

A Platform of Resynthesizing a Clock Architecture Into Power-and-Area Effective Clock Trees.

Tung-Liang Lin Sao-Jie Chen

HPE: Hierarchical Page Eviction Policy for Unified Memory in GPUs.

Qi Yu Bruce R. Childers Libo Huang Cheng Qian Zhiying Wang

Handling Stuck-at-Fault Defects Using Matrix Transformation for Robust Inference of DNNs.

Baogang Zhang Necati Uysal Deliang Fan Rickard Ewetz

SIMPLER MAGIC: Synthesis and Mapping of In-Memory Logic Executed in a Single Row to Improve Throughput.

Rotem Ben Hur Ronny Ronen Ameer Haj Ali Debjyoti Bhattacharjee Adi Eliahu Natan Peled Shahar Kvatinsky

SearcHD: A Memory-Centric Hyperdimensional Computing With Stochastic Training.

Mohsen Imani Xunzhao Yin John Messerly Saransh Gupta Michael T. Niemier Xiaobo Sharon Hu Tajana Rosing

Structured Decomposition for Reversible Boolean Functions.

Jiaqing Jiang Xiaoming Sun Yuan Sun Kewen Wu Zhiyu Xia

FRF: Toward Warp-Scheduler Friendly STT-RAM/SRAM Fine-Grained Hybrid GPGPU Register File Design.

Quan Deng Youtao Zhang Zhenyu Zhao Shuzheng Zhang Minxuan Zhang Jun Yang

Thermal-Aware Design and Simulation Approach for Optical NoCs.

Yaoyao Ye Wenfei Zhang Weichen Liu

Improved Mapping of Quantum Circuits to IBM QX Architectures.

Abhoy Kole Stefan Hillmich Kamalika Datta Robert Wille Indranil Sengupta

TraNNsformer: Clustered Pruning on Crossbar-Based Architectures for Energy-Efficient Neural Networks.

Aayush Ankit Timur Ibrayev Abhronil Sengupta Kaushik Roy

Exploiting In-Memory Data Patterns for Performance Improvement on Crossbar Resistive Memory.

Wen Wen Lei Zhao Youtao Zhang Jun Yang

Scope-Aware Useful Cache Block Calculation for Cache-Related Pre-Emption Delay Analysis With Set-Associative Data Caches.

Wei Zhang Nan Guan Lei Ju Yue Tang Weichen Liu Zhiping Jia

Decomposition-Based Real-Time Scheduling of Parallel Tasks on Multicores Platforms.

Xu Jiang Nan Guan Xiang Long Han Wan

Ærø: A Platform Architecture for Mixed-Criticality Airborne Systems.

Shibarchi Majumder Jens Frederik Dalsgaard Nielsen Thomas Bak

Energy-Constrained Data Freshness Optimization in Self-Powered Networked Embedded Systems.

Zimeng Zhou Chenchen Fu Chun Jason Xue Song Han

Fork Path: Batching ORAM Requests to Remove Redundant Memory Accesses.

Jingchen Zhu Guangyu Sun Xian Zhang Chao Zhang Weiqi Zhang Yun Liang Tao Wang Yiran Chen Jia Di

QuantHD: A Quantization Framework for Hyperdimensional Computing.

Mohsen Imani Samuel Bosch Sohum Datta Sharadhi Ramakrishna Sahand Salamat Jan M. Rabaey Tajana Rosing

High-Throughput CNN Inference on Embedded ARM Big.LITTLE Multicore Processors.

Siqi Wang Gayathri Ananthanarayanan Yifan Zeng Neeraj Goel Anuj Pathania Tulika Mitra

$Q$ -Value Prediction for Reinforcement Learning Assisted Garbage Collection to Reduce Long Tail Latency in SSD.

Won-Kyung Kang Sungjoo Yoo

Aging Capacitor Supported Cache Management Scheme for Solid-State Drives.

Congming Gao Liang Shi Qiao Li Kai Liu Chun Jason Xue Jun Yang Youtao Zhang

Improving Reliability of Soft Real-Time Embedded Systems on Integrated CPU and GPU Platforms.

Yue Ma Junlong Zhou Thidapat Chantem Robert P. Dick Shige Wang Xiaobo Sharon Hu

AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores.

Basireddy Karunakar Reddy Amit Kumar Singh Bashir M. Al-Hashimi Geoff V. Merrett

Thwarting Replication Attack Against Memristor-Based Neuromorphic Computing System.

Chaofei Yang Beiye Liu Hai Li Yiran Chen Mark Barnell Qing Wu Wujie Wen Jeyavijayan Rajendran

LOOPLock: Logic Optimization-Based Cyclic Logic Locking.

Hsiao-Yu Chiang Yung-Chih Chen De-Xuan Ji Xiang-Min Yang Chia-Chun Lin Chun-Yao Wang

A First Study of Compressive Sensing for Side-Channel Leakage Sampling.

Changhai Ou Chengju Zhou Siew-Kei Lam

A Physical Design Flow Against Front-Side Probing Attacks by Internal Shielding.

Huanyu Wang Qihang Shi Adib Nahiyan Domenic Forte Mark M. Tehranipoor

Approximation Attacks on Strong PUFs.

Junye Shi Yang Lu Jiliang Zhang

Memory-Based High-Level Synthesis Optimizations Security Exploration on the Power Side-Channel.

Lu Zhang Dejun Mu Wei Hu Yu Tai Jeremy Blackstone Ryan Kastner

Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures.

Pierluigi Nuzzo Nikunj Bajaj Michael Masin Dmitrii Kirov Roberto Passerone Alberto L. Sangiovanni-Vincentelli

Exploring Renewable-Adaptive Computation Offloading for Hierarchical QoS Optimization in Fog Computing.

Kun Cao Junlong Zhou Guo Xu Tongquan Wei Shiyan Hu

Scenario-Based Online Reachability Validation for CPS Fault Prediction.

Lei Bu Qixin Wang Xinyue Ren Shaopeng Xing Xuandong Li

Schedulability Analysis of Engine Control Systems With Dynamic Switching Speeds.

Yu Liu Chao Peng Yecheng Zhao Yangyang Li Haibo Zeng

The Software/Hardware Co-Design and Implementation of SM2/3/4 Encryption/Decryption and Digital Signature System.

Xin Zheng Chongyao Xu Xianghong Hu Yun Zhang Xiaoming Xiong

Robust Identification of Thermal Models for In-Production High-Performance-Computing Clusters With Machine Learning-Based Data Selection.

Federico Pittino Roberto Diversi Luca Benini Andrea Bartolini

Efficient Rare Failure Analysis Over Multiple Corners via Correlated Bayesian Inference.

Zhengqi Gao Jun Tao Yangfeng Su Dian Zhou Xuan Zeng Xin Li

High Frequency Meminductor Emulator Employing VDTA and its Application.

John Vista Ashish Ranjan

Dynamic Test Stimulus Adaptation for Analog/RF Circuits Using Booleanized Models Extracted From Hardware.

Sabyasachi Deyati Barry J. Muldrey Abhijit Chatterjee

An Analytical Model for Hot Carrier Induced Long-Term Degradation in Power Amplifiers.

Hossein Eslahi Sayed Ali Albahrani Dhawal Mahajan Sourabh Khandelwal

Augmented Cross-Entropy-Based Joint Temperature Optimization of Real-Time 3-D MPSoC Systems.

Yangguang Cui Kun Cao Liying Li Junlong Zhou Tongquan Wei Shiyan Hu

Temperature-Aware DRAM Cache Management - Relaxing Thermal Constraints in 3-D Systems.

Minxuan Zhou Andreas Prodromou Rui Wang Hailong Yang Depei Qian Dean M. Tullsen

Keynote: A Disquisition on Logic Locking.

Abhishek Chakraborty Nithyashankari Gummidipoondi Jayasankaran Yuntao Liu Jeyavijayan Rajendran Ozgur Sinanoglu Ankur Srivastava Yang Xie Muhammad Yasin Michael Zuzak


Volume 39, Number 9, September 2020
Self-Learning and Efficient Health-Status Analysis for a Core Router System.

Shi Jin Zhaobo Zhang Krishnendu Chakrabarty Xinli Gu

A 3-D Rotation-Based Through-Silicon via Redundancy Architecture for Clustering Faults.

Minho Cheong Ingeol Lee Sungho Kang

Power Delivery Exploration Methodology Based on Constrained Optimization.

Rassul Bairamkulov Kan Xu Mikhail Popovich Juan Ochoa Vaishnav Srinivas Eby G. Friedman

Dr. CU: Detailed Routing by Sparse Grid Graph and Minimum-Area-Captured Path Search.

Gengjie Chen Chak-Wa Pui Haocheng Li Evangeline F. Y. Young

Balancing Computation Loads and Optimizing Input Vector Loading in LSTM Accelerators.

Junki Park Wooseok Yi Daehyun Ahn Jaeha Kung Jae-Joon Kim

MemFlow: Memory-Driven Data Scheduling With Datapath Co-Design in Accelerators for Large-Scale Inference Applications.

Qi Nie Sharad Malik

Ultralow Power Nonvolatile Logic Based on Spin-Orbit and Exchange Coupled Nanowires.

Zoha Pajouhi

Pattern-Aware Encoding for MLC PCM Storage Density, Energy Efficiency, and Performance Enhancement.

Taehyun Kwon Muhammad Imran Joon-Sung Yang

NeuADC: Neural Network-Inspired Synthesizable Analog-to-Digital Conversion.

Weidong Cao Xin He Ayan Chakrabarti Xuan Zhang

Impact of Thermal Boundary Resistance on the Performance and Scaling of Phase-Change Memory Device.

Suresh Durai Srinivasan Raj Anbarasu Manivannan

CAMON: Low-Cost Silicon Photonic Chiplet for Manycore Processors.

Zhehui Wang Zhifei Wang Jiang Xu Yi-Shing Chang Jun Feng Xuanqi Chen Shixi Chen Jiaxu Zhang

A Low Power Reconfigurable Memory Architecture for Complementary Resistive Switches.

Bing Wu Dan Feng Wei Tong Jingning Liu Chengning Wang Wei Zhao Yang Zhang

UniBuffer: Optimizing Journaling Overhead With Unified DRAM and NVM Hybrid Buffer Cache.

Zhiyong Zhang Zhaoyan Shen Zhiping Jia Zili Shao

Scramble Suit: A Profile Differentiation Countermeasure to Prevent Template Attacks.

Alessandro Barenghi William Fornaciari Gerardo Pelosi Davide Zoni

ParaML: A Polyvalent Multicore Accelerator for Machine Learning.

Shengyuan Zhou Qi Guo Zidong Du Dao-Fu Liu Tianshi Chen Ling Li Shaoli Liu Jinhong Zhou Olivier Temam Xiaobing Feng Xuehai Zhou Yunji Chen

Global Clean Page First Replacement and Index-Aware Multistream Prefetcher in Hybrid Memory Architecture.

Ing-Chao Lin Da-Wei Chang Wei-Jun Chen Jian-Ting Ke Po-Han Huang


Volume 39, Number 8, August 2020
Compact Topology-Aware Bus Routing for Design Regularity.

Daeyeon Kim SangGi Do Sung-Yun Lee Seokhyeong Kang

Broadside Tests for Transition and Stuck-At Faults.

Irith Pomeranz

Toward Model Checking-Driven Fair Comparison of Dynamic Thermal Management Techniques Under Multithreaded Workloads.

Syed Ali Asadullah Bukhari Faiq Khalid Osman Hasan Muhammad Shafique Jörg Henkel

Assertion Ranking Using RTL Source Code Analysis.

Debjit Pal Spencer Offenberger Shobha Vasudevan

Deterministic Stellar BIST for Automotive ICs.

Yingdi Liu Nilanjan Mukherjee Janusz Rajski Sudhakar M. Reddy Jerzy Tyszer

Highly Reliable Memory Architecture Using Adaptive Combination of Proactive Aging-Aware In-Field Self-Repair and ECC.

Gian Mayuga Yasuo Sato Michiko Inoue

Design of a Host Interface Logic for GC-Free SSDs.

Myoungsoo Jung Wonil Choi Miryeong Kwon Shekhar Srikantaiah Joonhyuk Yoo Mahmut Taylan Kandemir

iClaire: A Fast and General Layout Pattern Classification Algorithm With Clip Shifting and Centroid Recreation.

Wei-Chun Chang Iris Hui-Ru Jiang

High-Dimensional Uncertainty Quantification of Electronic and Photonic IC With Non-Gaussian Correlated Process Variations.

Chunfeng Cui Zheng Zhang

Method for the Computer-Aided Schematic Design and Simulation of Hydrogel-Based Microfluidic Systems.

Andreas Voigt Jörg Schreiter Philipp Frank Cesare Pini Christian Mayr Andreas Richter

Advanced Functional Decomposition Using Majority and Its Applications.

Zhufei Chu Mathias Soeken Yinshui Xia Lun-Yao Wang Giovanni De Micheli

Characterization of In-Cone Logic Locking Resiliency Against the SAT Attack.

Kyle Juretus Ioannis Savidis

Spin-Orbit Torque Devices for Hardware Security: From Deterministic to Probabilistic Regime.

Satwik Patnaik Nikhil Rangarajan Johann Knechtel Ozgur Sinanoglu Shaloo Rakheja

The SAT Attack on IC Camouflaging: Impact and Potential Countermeasures.

Mohamed El Massad Siddharth Garg Mahesh V. Tripunitara

A Retrospective on Path ORAM.

Emil Stefanov Marten van Dijk Elaine Shi Christopher W. Fletcher Ling Ren Xiangyao Yu Srinivas Devadas

RowHammer: A Retrospective.

Onur Mutlu Jeremie S. Kim

Compiler-Based Techniques to Secure Cryptographic Embedded Software Against Side-Channel Attacks.

Giovanni Agosta Alessandro Barenghi Gerardo Pelosi


Volume 39, Number 7, July 2020
Unified and Scalable Digit-Serial Systolic Array for Multiplication and Division Over GF (2m).

Atef Ibrahim

Online Firmware Functional Validation Scheme Using Colored Petri Net Model.

Rongyang Liu José G. Delgado-Frias Doug Boyce Yi Qian Rahul Khanna

Reducing Interpolant Circuit Size Through SAT-Based Weakening.

Gianpiero Cabodi Paolo Camurati Marco Palena Paolo Pasini Danilo Vendraminetto

Semisupervised Hotspot Detection With Self-Paced Multitask Learning.

Ying Chen Yibo Lin Tianyang Gai Yajuan Su Yayi Wei David Z. Pan

Noise-Aware DVFS for Efficient Transitions on Battery-Powered IoT Devices.

Cheng Zhuo Shaoheng Luo Houle Gan Jiang Hu Zhiguo Shi

Selective Flip-Flop Optimization for Reliable Digital Circuit Design.

Mohammad Saber Golanbari Saman Kiamehr Mojtaba Ebrahimi Mehdi Baradaran Tahoori

ALFANS: Multilevel Approximate Logic Synthesis Framework by Approximate Node Simplification.

Yi Wu Weikang Qian

Fast Lagrangian Relaxation-Based Multithreaded Gate Sizing Using Simple Timing Calibrations.

Ankur Sharma David G. Chinnery Tiago Reimann Sarvesh Bhardwaj Chris Chu

Toward an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2-D and 3-D CNNs on FPGA.

Junzhong Shen You Huang Mei Wen Chunyuan Zhang

Performance Modeling and Directives Optimization for High-Level Synthesis on FPGA.

Jieru Zhao Liang Feng Sharad Sinha Wei Zhang Yun Liang Bingsheng He

Low Bit-Width Convolutional Neural Network on RRAM.

Yi Cai Tianqi Tang Lixue Xia Boxun Li Yu Wang Huazhong Yang

Leakage-Aware Predictive Thermal Management for Multicore Systems Using Echo State Network.

Hai Wang Xingxing Guo Sheldon X.-D. Tan Chi Zhang He Tang Yuan Yuan

Model-Based Adaptation of Mixed-Criticality Multiservice Systems for Extreme Physical Environments.

Zonghui Li Hai Wan Yangdong Deng Xibin Zhao Yue Gao Xiaoyu Song Ming Gu

PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs.

Ye X. Ding Florin Burcea Husni M. Habal Helmut E. Graeb

Addressing a New Class of Reliability Threats in 3-D Network-on-Chips.

Ebadollah Taheri Mihailo Isakov Ahmad Patooghy Michel A. Kinsy


Volume 39, Number 6, June 2020
Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model.

Maciej J. Ciesielski Tiankai Su Atif Yasin Cunxi Yu

Generating Single- and Double-Pattern Tests for Multiple CMOS Fault Models in One ATPG Run.

Yi-Cheng Kung Kuen-Jong Lee Sudhakar M. Reddy

Energy-Efficient Runtime Adaptable L1 STT-RAM Cache Design.

Kyle Kuan Tosiron Adegbija

Timing-Driven Flow-Channel Network Construction for Continuous-Flow Microfluidic Biochips.

Xing Huang Tsung-Yi Ho Krishnendu Chakrabarty Wenzhong Guo

Optimization Approach to Accelerator Codesign.

Nirmal Prajapati Sanjay V. Rajopadhye Hristo N. Djidjev Nandakishore Santhi Tobias Grosser Rumen Andonov

Beyond Address Mapping: A User-Oriented Multiregional Space Management Design for 3-D NAND Flash Memory.

Shuo-Han Chen Che-Wei Tsao Yuan-Hao Chang

A Streaming Dataflow Engine for Sparse Matrix-Vector Multiplication Using High-Level Synthesis.

Mohammad Hosseinabady José Luis Núñez-Yáñez

Automatic Generation of Differential-Input Differential-Output Second-Order Filters Based on a Differential Pair.

Brent J. Maundy Ahmed S. Elwakil Leonid Belostotski

Simultaneous Reconnection Surgery Technique of Routing With Machine Learning-Based Acceleration.

Peishan Tu Chak-Wa Pui Evangeline F. Y. Young

Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection.

Raphael Andreoni Camponogara Viera Philippe Maurine Jean-Max Dutertre Rodrigo Possamai Bastos

SALT: Provably Good Routing Topology by a Novel Steiner Shallow-Light Tree Algorithm.

Gengjie Chen Evangeline F. Y. Young

On Coloring Rectangular and Diagonal Grid Graphs for Multipatterning and DSA Lithography.

Daifeng Guo Hongbo Zhang Martin D. F. Wong

Generalized Fault-Tolerance Topology Generation for Application-Specific Network-on-Chips.

Song Chen Mengke Ge Zhigang Li Jinglei Huang Qi Xu Feng Wu

Eh?Predictor: A Deep Learning Framework to Identify Detailed Routing Short Violations From a Placed Netlist.

Aysa Fakheri Tabrizi Nima Karimpour Darav Logan Rakai Ismail Bustany Andrew A. Kennings Laleh Behjat

Construction of All Rectilinear Steiner Minimum Trees on the Hanan Grid and Its Applications to VLSI Design.

Sheng-En David Lin Dae Hyun Kim

Compact-2D: A Physical Design Methodology to Build Two-Tier Gate-Level 3-D ICs.

Bon Woong Ku Kyungwook Chang Sung Kyu Lim


Volume 39, Number 5, May 2020
On Error Injection for NoC Platforms: A UVM-Based Generic Verification Environment.

Sameh El-Ashry Mostafa Khamis Hala Ibrahim Ahmed Shalaby Mohamed Abdelsalam M. Watheq El-Kharashi

MRIMA: An MRAM-Based In-Memory Accelerator.

Shaahin Angizi Zhezhi He Amro Awad Deliang Fan

Approaches for Assigning Offsets to Signals for Improving Frame Packing in CAN-FD.

Prachi Joshi S. S. Ravi Qingyu Liu Unmesh D. Bordoloi Soheil Samii Sandeep Kumar Shukla Haibo Zeng

Obstacle-Avoiding Open-Net Connector With Precise Shortest Distance Estimation.

Guan-Qi Fang Yong Zhong Yi-Hao Cheng Shao-Yun Fang

Memristor Model Optimization Based on Parameter Extraction From Device Characterization Data.

Chris Yakopcic Tarek M. Taha David J. Mountain Thomas Salter Matthew J. Marinella Mark R. McLean

A Novel Hierarchical Circuit LUT Model for SOI Technology for Rapid Prototyping.

Sitansusekhar Roymohapatra Ganesh R. Gore Akanksha Yadav Mahesh B. Patil Krishnan S. Rengarajan Subramanian S. Iyer Maryam Shojaei Baghini

Improving Combinational Circuit Reliability Against Multiple Event Transients via a Partition and Restructuring Approach.

Mohammad Reza Rohanipoor Behnam Ghavami Mohsen Raji

Exact Synthesis of Nearest Neighbor Compliant Quantum Circuits in 2-D Architecture and Its Application to Large-Scale Circuits.

Jingwen Ding Shigeru Yamashita

An Extended Nonstrict Partially Ordered Set-Based Configurable Linear Sorter on FPGAs.

Dalin Li Lan Huang Teng Gao Yang Feng Adriano Tavares Kangping Wang

Efficient Job Offloading in Heterogeneous Systems Through Hardware-Assisted Packet-Based Dispatching and User-Level Runtime Infrastructure.

Othon Tomoutzoglou Dimitrios Mbakoyiannis George Kornaros Marcello Coppola

Analysis and Design of Tamper-Mitigating Microfluidic Routing Fabrics.

Jack Tang Mohamed Ibrahim Krishnendu Chakrabarty Ramesh Karri

ApproxIt: A Quality Management Framework of Approximate Computing for Iterative Methods.

Qian Zhang Qiang Xu

Modeling and Analysis of Optical Modulators Based on Free-Carrier Plasma Dispersion Effect.

Xuanqi Chen Zhifei Wang Yi-Shing Chang Jiang Xu Jun Feng Peng Yang Zhehui Wang Luan H. K. Duong

Estimation of Analog/RF Parametric Test Metrics Based on a Multivariate Extreme Value Model.

Ahcène Bounceur Salvador Mir Reinhardt Euler Kamel Beznia

Automating the Design of Asynchronous Logic Control for AMS Electronics.

Danil Sokolov Victor Khomenko Andrey Mokhov Vladimir Dubikhin David Lloyd Alex Yakovlev


Volume 39, Number 4, April 2020
Reliable Macromodel Generation for the Capacitance Extraction Based on Macromodel-Aware Random Walk Algorithm.

Ming Yang Wenjian Yu

Switching Activity of Faulty Circuits in Presence of Multiple Transition Faults.

Irith Pomeranz

Enhancing Network-on-Chip Performance by Reusing Trace Buffers.

Neetu Jindal Shubhani Gupta Divya Praneetha Ravipati Preeti Ranjan Panda Smruti R. Sarangi

Using Error Modes Aware LDPC to Improve Decoding Performance of 3-D TLC NAND Flash.

Fei Wu Meng Zhang Yajuan Du Weihua Liu Zuo Lu Jiguang Wan Zhi-hu Tan Changsheng Xie

LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency.

Fulya Kaplan Mostafa Said Sherief Reda Ayse K. Coskun

Accelerating Electromigration Aging: Fast Failure Detection for Nanometer ICs.

Sheriff Sadiqbatcha Zeyu Sun Sheldon X.-D. Tan

SAT-Based Exact Synthesis: Encodings, Topology Families, and Parallelism.

Winston Haaswijk Mathias Soeken Alan Mishchenko Giovanni De Micheli

Evaluating Fast Algorithms for Convolutional Neural Networks on FPGAs.

Yun Liang Liqiang Lu Qingcheng Xiao Shengen Yan

Performance Modeling for CNN Inference Accelerators on FPGA.

Yufei Ma Yu Cao Sarma B. K. Vrudhula Jae-Sun Seo

ParRA: A Shared Memory Parallel FPGA Router Using Hybrid Partitioning Approach.

Dekui Wang Zhenhua Duan Cong Tian Bohu Huang Nan Zhang

Storage-Aware Algorithms for Dilution and Mixture Preparation With Flow-Based Lab-on-Chip.

Sukanta Bhattacharjee Robert Wille Juinn-Dar Huang Bhargab B. Bhattacharya

A Novel High Performance and Energy Efficient NUCA Architecture for STT-MRAM LLCs With Thermal Consideration.

Bi Wu Pengcheng Dai Yuanqing Cheng Ying Wang Jianlei Yang Zhaohao Wang Dijun Liu Weisheng Zhao

SPINBIS: Spintronics-Based Bayesian Inference System With Stochastic Computing.

Xiaotao Jia Jianlei Yang Pengcheng Dai Runze Liu Yiran Chen Weisheng Zhao

Peak-Power-Aware Energy Management for Periodic Real-Time Applications.

Mohsen Ansari Amir Yeganeh-Khaksar Sepideh Safari Alireza Ejlali

Logic Locking With Provable Security Against Power Analysis Attacks.

Abhrajit Sengupta Bodhisatwa Mazumdar Muhammad Yasin Ozgur Sinanoglu

SAFARI: Automatic Synthesis of Fault-Attack Resistant Block Cipher Implementations.

Indrani Roy Chester Rebeiro Aritra Hazra Swarup Bhunia


Volume 39, Number 3, March 2020
maj-n Logic Synthesis for Emerging Technology.

Augusto Neutzling Felipe S. Marranghello Jody Maick Matos André Inácio Reis Renato P. Ribas

Reverse Low-Power Broadside Tests.

Irith Pomeranz

Chaining and Biasing: Test Generation Techniques for Shared-Memory Verification.

Gabriel A. G. Andrade Marleson Graf Luiz C. V. dos Santos

Software-Based Self-Testing Using Bounded Model Checking for Out-of-Order Superscalar Processors.

Ying Zhang Krishnendu Chakrabarty Zebo Peng Ahmed Rezine Huawei Li Petru Eles Jianhui Jiang

Hierarchical Symbol-Based Health-Status Analysis Using Time-Series Data in a Core Router System.

Shi Jin Zhaobo Zhang Krishnendu Chakrabarty Xinli Gu

Energy Minimization for Multicore Platforms Through DVFS and VR Phase Scaling With Comprehensive Convex Model.

Zuomin Zhu Wei Zhang Vivek Chaturvedi Amit Kumar Singh

Corner-Stitching-Based Multilayer Obstacle-Avoiding Component-to-Component Rectilinear Minimum Spanning Tree Construction.

Yen-Yu Su Shuo-Hui Wang Wei-Liang Wu Mark Po-Hung Lin

Fast Methodology for Time-Domain Analysis of Nonlinear-Loaded Transmission Line Excited by an Arbitrary Modulated Signal.

Sedigheh Kouhpayeh-Zadeh-Esfahani Abdolali Abdipour Kambiz Afrooz

A Novel Heuristic Search Method for Two-Level Approximate Logic Synthesis.

Sanbao Su Chen Zou Weijiang Kong Jie Han Weikang Qian

A Cross-Layer Optimization Framework for Integrated Optical Switches in Data Centers.

Zhifei Wang Peng Yang Yi-Shing Chang Jiang Xu Xuanqi Chen Zhehui Wang Jun Feng

Multidomain Inter/Intrachip Silicon Photonic Networks for Energy-Efficient Rack-Scale Computing Systems.

Peng Yang Zhehui Wang Zhifei Wang Jiang Xu Yi-Shing Chang Xuanqi Chen Rafael K. V. Maeda Jun Feng

Integrated Control-Fluidic Codesign Methodology for Paper-Based Digital Microfluidic Biochips.

Qin Wang Ulf Schlichtmann Yici Cai Weiqing Ji Zeyan Li Haena Cheong Oh-Sun Kwon Hailong Yao Tsung-Yi Ho Kwanwoo Shin Bing Li

Multiple Subpage Writing FTL in MLC by Exploiting Dual Mode Operations.

Yazhi Feng Dan Feng Wei Tong Jingning Liu Shuai Li

QT-Adaptation Engine: Adaptive QoS-Aware Scheduling and Governing in Thermally Constrained Mobile Devices.

Po-Hao Huang Ya-Shu Chen Jian-He Liao

Fast Operation Mode Selection for Highly Efficient IoT Edge Devices.

Farzad Samie Vasileios Tsoutsouras Dimosthenis Masouros Lars Bauer Dimitrios Soudris Jörg Henkel

A Multilevel Bottom-Up Optimization Methodology for the Automated Synthesis of RF Systems.

Fábio Passos Elisenda Roca Javier J. Sieiro Rafaella Fiorelli Rafael Castro-López José María López-Villegas Francisco V. Fernández

Temperature Dependence of the Taylor Series Coefficients and Intermodulation Distortion Characteristics of GaN HEMT.

Mohammad Abdul Alim Mayahsa M. Ali Ali A. Rezazadeh Christophe Gaquière


Volume 39, Number 2, February 2020
Prediction of Multidimensional Spatial Variation Data via Bayesian Tensor Completion.

Jiali Luan Zheng Zhang

Emphasizing Functional Relevance Over State Restoration in Post-Silicon Signal Tracing.

Debjit Pal Sai Ma Shobha Vasudevan

From Virtual Characterization to Test-Chips: DFM Analysis Through Pattern Enumeration.

Mayler G. A. Martins Samuel N. Pagliarini Mehmet Meric Isgenc Lawrence T. Pileggi

A Post-Bond TSV Test Method Based on RGC Parameters Measurement.

Yang Yu Xu Fang Xiyuan Peng

Automated Nonintrusive Analysis of Electronic System Level Designs.

Mehran Goli Jannis Stoppe Rolf Drechsler

Optimal Generalized H-Tree Topology and Buffering for High-Performance and Low-Power Clock Distribution.

Kwangsoo Han Andrew B. Kahng Jiajia Li

Iterative Diagnosis Approach for ECC-Based Memory Repair.

Panagiota Papavramidou Michael Nicolaidis

An Efficient and Accurate Time Step Control Method for Power Device Transient Simulation Utilizing Dominant Time Constant Approximation.

Shigetaka Kumashiro Tatsuya Kamei Akira Hiroki Kazutoshi Kobayashi

An FPGA-Based Hardware Emulator for Neuromorphic Chip With RRAM.

Tao Luo Xuan Wang Chuping Qu Matthew Kay Fei Lee Wai Teng Tang Weng-Fai Wong Rick Siow Mong Goh

Automatic Compilation of Diverse CNNs Onto High-Performance FPGA Accelerators.

Yufei Ma Yu Cao Sarma B. K. Vrudhula Jae-Sun Seo

Serial-Equivalent Static and Dynamic Parallel Routing for FPGAs.

Minghua Shen Wentai Zhang Guojie Luo Nong Xiao

Logic Synthesis of Pass-Gate Logic Circuits With Emerging Ambipolar Technologies.

Valerio Tenace Andrea Calimera Enrico Macii Massimo Poncino

Automatic Droplet Sequence Generation for Microfluidic Networks With Passive Droplet Routing.

Andreas Grimmer Werner Haselmayr Robert Wille

A Partial Page Cache Strategy for NVRAM-Based Storage Devices.

Shuo-Han Chen Tseng-Yi Chen Yuan-Hao Chang Hsin-Wen Wei Wei-Kuan Shih

An Efficient Fault-Tolerant Valve-Based Microfluidic Routing Fabric for Droplet Barcoding in Single-Cell Analysis.

Yasamin Moradi Mohamed Ibrahim Krishnendu Chakrabarty Ulf Schlichtmann

Runtime Efficiency-Accuracy Tradeoff Using Configurable Floating Point Multiplier.

Daniel Peroni Mohsen Imani Tajana Simunic Rosing

Estimate and Recompute: A Novel Paradigm for Approximate Computing on Data Flow Graphs.

Mingze Gao Gang Qu

Current-Aware Flash Scheduling for Current Capping in Solid State Disks.

Li-Pin Chang Chia-Hsiang Cheng Shu-Ting Chang Po-Han Chou

Threshold-Defined Logic and Interconnect for Protection Against Reverse Engineering.

Jae-Won Jang Asmit De Deepak Vontela Ithihasa Reddy Nirmala Swaroop Ghosh Anirudh Iyengar

Mating Sensitivity Analysis and Statistical Verification for Efficient Yield Estimation.

Ibtissem Seghaier Mohamed H. Zaki Sofiène Tahar

Dynamic Frequency Scaling Aware Opportunistic Through-Silicon-Via Inductor Utilization in Resonant Clocking.

Umamaheswara Rao Tida Cheng Zhuo Leibo Liu Yiyu Shi


Volume 39, Number 1, January 2020
Correction to "Analytical Thermal Model for Self-Heating in Advanced FinFET Devices With Implications for Design and Reliability".

Chuan Xu Seshadri K. Kolluri Kazuhiko Endo Kaustav Banerjee

Combinational Hybrid Signal Selection With Updated Reachability Lists for Post-Silicon Debug.

Siamack BeigMohammadi Bijan Alizadeh

Efficient Reconfiguration Algorithm With Flexible Rerouting Schemes for Constructing 3-D VLSI Subarrays.

Junyan Qian Hao Ding Hanpeng Xiao Zhide Zhou Lingzhong Zhao Zhongyi Zhai

Multicycle Broadside and Skewed-Load Tests for Test Compaction.

Irith Pomeranz

Post-Silicon Gate-Level Error Localization With Effective and Combined Trace Signal Selection.

Binod Kumar Kanad Basu Masahiro Fujita Virendra Singh

GPGPU-Based ATPG System: Myth or Reality?

Liyang Lai Kun-Han Tsai Huawei Li

Enforcing Passivity of Parameterized LTI Macromodels via Hamiltonian-Driven Multivariate Adaptive Sampling.

Alessandro Zanco Stefano Grivet-Talocia Tommaso Bradde Marco De Stefano

Support-Reducing Decomposition for FPGA Mapping.

Lucas Machado Jordi Cortadella

Integrated Optimization of Partitioning, Scheduling, and Floorplanning for Partially Dynamically Reconfigurable Systems.

Song Chen Jinglei Huang Xiaodong Xu Bo Ding Qi Xu

Time-Triggered Switch-Memory-Switch Architecture for Time-Sensitive Networking Switches.

Zonghui Li Hai Wan Yangdong Deng Xibin Zhao Yue Gao Xiaoyu Song Ming Gu

Synthesis of Tamper-Resistant Pin-Constrained Digital Microfluidic Biochips.

Jack Tang Mohamed Ibrahim Krishnendu Chakrabarty Ramesh Karri

URBER: Ultrafast Rule-Based Escape Routing Method for Large-Scale Sample Delivery Biochips.

Jiayi Weng Tsung-Yi Ho Weiqing Ji Peng Liu Mengdi Bao Hailong Yao

FlexFloat: A Software Library for Transprecision Computing.

Giuseppe Tagliavini Andrea Marongiu Luca Benini

Downsizing Without Downgrading: Approximated Dynamic Time Warping on Nonvolatile Memories.

Duo Liu Xingni Li Po-Chun Huang Yi Gu Yingjian Ling Kan Zhong Renping Liu Xianzhang Chen Liang Liang

SemiMap: A Semi-Folded Convolution Mapping for Speed-Overhead Balance on Crossbars.

Lei Deng Yuan Xie Ling Liang Guanrui Wang Liang Chang Xing Hu Xin Ma Liu Liu Jing Pei Guoqi Li

Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey.

Santiago Pagani Sai Manoj P. D. Axel Jantsch Jörg Henkel

Online Resource Management for Improving Reliability of Real-Time Systems on "Big-Little" Type MPSoCs.

Yue Ma Junlong Zhou Thidapat Chantem Robert P. Dick Shige Wang Xiaobo Sharon Hu

A Dynamic and Proactive GPU Preemption Mechanism Using Checkpointing.

Chen Li Andrew Zigerelli Jun Yang Youtao Zhang Sheng Ma Yang Guo

A Latency-Optimized and Energy-Efficient Write Scheme in NVM-Based Main Memory.

Yuncheng Guo Yu Hua Pengfei Zuo

Freezing: Eliminating Unnecessary Drawing Computation for Low Power.

Bohun Seo Hyeonggyu Kim Soontae Kim

Real-Time Detection of Power Analysis Attacks by Machine Learning of Power Supply Variations On-Chip.

Dmitry Utyamishev Inna Partin-Vaisband

Table Recomputation-Based Higher-Order Masking Against Horizontal Attacks.

Zhipeng Guo Ming Tang Emmanuel Prouff Maixing Luo Fei Yan

PMTP: A MAX-SAT-Based Approach to Detect Hardware Trojan Using Propagation of Maximum Transition Probability.

Ahmad Shabani Bijan Alizadeh

A Synthesizable Constant Tuning Gain Technique for Wideband LC-VCO Design.

Xiaoxue Sun Chenyang Kong Yingyu Chen Jun Tao Zhangwen Tang

FUZYE: A Fuzzy c-Means Analog IC Yield Optimization Using Evolutionary-Based Algorithms.

António Canelas Ricardo Póvoa Ricardo Martins Nuno Lourenço Jorge Guilherme João Paulo Carvalho Nuno Horta